1. Technical Field
The present invention relates to a parallel inverter device that drives a load such as an alternating current motor using a plurality of inverters connected in parallel.
2. Related Art
In general, an inverter is configured of a power converter and a control device that controls the power converter. When driving an alternating current motor with the inverter, a torque command value or voltage command value sent from the control device is transmitted to a plurality of power converters, and an operating of each power converter is carried out.
For example, heretofore known technology whereby each of a plurality of inverters includes an output current control system, and each inverter individually drives an alternating current motor, is described in JP-A-3-159596 (Page 3, top left column, Line 8 to bottom left column, Line 13, FIG. 2, and the like).
FIG. 4 is a configuration diagram of the heretofore known technology described in JP-A-3-159596 (Page 3, top left column, Line 8 to bottom left column, Line 13, FIG. 2, and the like), wherein reference numerals 201a and 201b are inverters, 202a and 202b are alternating current motors individually driven by the inverters 201a and 201b respectively, 203 is a controller, 204 is a master station, 205a, 205b, 206a, and 206b are remote stations, 207a is a speed sensor, 208a is a speed controller, 209a and 209b are current controllers, 210a and 210b are current sensors, 211a and 211b are power converters (inverter portions) that carry out a direct current to alternating current conversion by an action of a semiconductor switching element, and 220 is a transmission line.
This heretofore known technology is such that information can be serially transmitted between the controller 203 and the inverters 201a and 201b. Further, the controller 203 is configured so that the motors 202a and 202b are individually driven by calculated torque command values being distributed, the distributed torque command values being transmitted individually to the inverters 201a and 201b by serial transmission, and each of the inverters 201a and 201b acting in accordance with its own torque command value.
In FIG. 4, N* is a speed command value, Ia* and Ib* are current command values of the inverters 201a and 201b, and Ia and Ib are current detection values of the inverters 201a and 201b. 
Meanwhile, a parallel inverter device wherein increased capacity is enabled by connecting the output sides of a plurality of inverters in parallel, in order to drive a high-capacity alternating current motor, is described in, for example, JP-A-2008-228548 (Paragraphs [0031] to [0040], FIG. 4, FIG. 5, and the like).
FIG. 5 is a configuration diagram of the heretofore known technology described in JP-A-2008-228548 (Paragraphs [0031] to [0040], FIG. 4, FIG. 5, and the like), wherein reference numeral 100 is a parallel inverter device, 101 is an alternating current power source, 102 is an alternating current motor, 103 is a speed sensor, 110-1 and 110-2 are converters, 120-1 and 120-2 are smoothing capacitors, 130-1 and 130-2 are inverters, 131-1 and 131-2 are communication circuits, 132-1 and 132-2 are PWM generating circuits, 133-1 and 133-2 are condition monitoring circuits, 134-1 and 134-2 are power converters (PWM inverter portions), 140-1 and 140-2 are current sensors, and 150 is a control circuit.
This heretofore known technology is such that the two inverters 130-1 and 130-2 are connected in parallel between the alternating current power source 101 and the motor 102, a synchronization signal and a voltage command value are transmitted using a serial transmission means from the control circuit 150 to the communication circuits 131-1 and 131-2 in the inverters 130-1 and 130-2 and, by the inverters 130-1 and 130-2 acting based on the synchronization signal and the voltage command value, the outputs of the two inverters 130-1 and 130-2 are totaled, and supplied to the single motor 102.
The heretofore known technology according to JP-A-3-159596 (Page 3, top left column, Line 8 to bottom left column, Line 13, FIG. 2, and the like) is such that the inverters 201a and 201b respectively include the current controllers 209a and 209b, which control the output current, and as a result of the current controllers 209a and 209b responding individually, there is a danger of variation occurring in the voltage command values acting as the outputs of the current controllers 209a and 209b. Because of this, it may happen that an error occurs between the output voltages of the inverters 201a and 201b, and a cross-current or circulating current (hereafter, these will be referred to collectively as a cross-current) flows between the inverters.
As a countermeasure, it is necessary to secure a surplus equivalent to the amount of cross-current as a current capacity margin of the power converters 211a and 211b, and a problem occurs in that when the current value thereof is large, the capacity of the power converters increases, and the cost increases.
Also, it is necessary to install an AC reactor or interphase reactor in order to suppress instantaneous cross-current, which leads to an overall increase in the size and weight of the device, and to an increase in cost.
As the heretofore known technology described in JP-A-2008-228548 (Paragraphs [0031] to [0040], FIG. 4, FIG. 5, and the like) is such that a voltage command value is sent using the serial transmission means from the control circuit 150 to the communication circuits 131-1 and 131-2 of the inverters 130-1 and 130-2 respectively, and the inverters 130-1 and 130-2 drive the power converters 134-1 and 134-2 in accordance with the received voltage command value, it is necessary to configure the connection form (topology) of the inverters 130-1 and 130-2 so that the delays in transmission time from the control circuit 150 to the communication circuits 131-1 and 131-2 are identical.
Types of connection include, for example, a ring type connection wherein a plurality of inverters have no master-slave relationship, and a master-slave type connection wherein the control unit of one inverter is a master inverter that computes a voltage command value by itself and directly drives its own power converter, and the remaining inverters are slave inverters, each of which drives its own power converter based on the voltage command value received via the transmission means.
However, even in the event that these types of connection are adopted, it may happen, due to a delay in transmitting a control signal, that not all the inverter voltage command values coincide temporally, and it may happen that errors occur between the inverter output voltages. In this case, there is a problem in that excess cross-current flows between power converters through the wiring inductance of the output cables of power converters connected in parallel, and the semiconductor switching element is damaged, or the like.